CAP1_F=DISABLED_THIS_FEATU, CAP1_R=DISABLED_THIS_FEATU, CAP0_I=DISABLED_THIS_FEATU, CAP0_F=DISABLED_THIS_FEATU, CAP1_I=DISABLED_THIS_FEATU, CAP0_R=DISABLED_THIS_FEATU
Capture Control Register. The CCR controls which edges of the capture inputs are used to load the Capture Registers and whether or not an interrupt is generated for a capture event.
| CAP0_R | Capture on PWMn_CAP0 rising edge 0 (DISABLED_THIS_FEATU): Disabled. This feature is disabled. 1 (RISING_EDGE_A_SYNCH): Rising edge. A synchronously sampled rising edge on PWMn_CAP0 will cause CR0 to be loaded with the contents of the TC. |
| CAP0_F | Capture on PWMn_CAP0 falling edge 0 (DISABLED_THIS_FEATU): Disabled. This feature is disabled. 1 (FALLING_EDGE_A_SYNC): Falling edge. A synchronously sampled falling edge on PWMn_CAP0 will cause CR0 to be loaded with the contents of TC. |
| CAP0_I | Interrupt on PWMn_CAP0 event 0 (DISABLED_THIS_FEATU): Disabled. This feature is disabled. 1 (INTERRUPT_A_CR0_LOA): Interrupt. A CR0 load due to a PWMn_CAP0 event will generate an interrupt. |
| CAP1_R | Capture on PWMn_CAP1 rising edge. Reserved for PWM0. 0 (DISABLED_THIS_FEATU): Disabled. This feature is disabled. 1 (RISING_EDGE_A_SYNCH): Rising edge. A synchronously sampled rising edge on PWMn_CAP1 will cause CR1 to be loaded with the contents of the TC. |
| CAP1_F | Capture on PWMn_CAP1 falling edge. Reserved for PWM0. 0 (DISABLED_THIS_FEATU): Disabled. This feature is disabled. 1 (FALLING_EDGE_A_SYNC): Falling edge. A synchronously sampled falling edge on PWMn_CAP1 will cause CR1 to be loaded with the contents of TC. |
| CAP1_I | Interrupt on PWMn_CAP1 event. Reserved for PWM0. 0 (DISABLED_THIS_FEATU): Disabled. This feature is disabled. 1 (INTERRUPT_A_CR1_LOA): Interrupt. A CR1 load due to a PWMn_CAP1 event will generate an interrupt. |
| RESERVED | Reserved. Read value is undefined, only zero should be written. |